module EXMEM(clkIn,resetIn,signalsIn,lessIn,zeroIn,resultIn,Data2In,Imm32In,PCRelAddrIn,retAddrIn,rdIn,signalsOut,lessOut,zeroOut,resultOut,PCRelAddrOut,DataOut,Imm32Out,retAddrOut,rdOut);
  input clkIn; //from outside
  input resetIn; //from outside
  input[11:0] signalsIn; 
  input lessIn; 
  input zeroIn; 
  input[31:0] resultIn;
  input[31:0] Data2In;
  input[31:0] Imm32In;
  input[31:0] PCRelAddrIn;
  input[31:0] retAddrIn;
  input[4:0] rdIn;
  output reg[11:0] signalsOut; 
  output reg lessOut;
  output reg zeroOut;
  output reg[31:0] resultOut;
  output reg[31:0] PCRelAddrOut;
  output reg[31:0] DataOut; 
  output reg[31:0] Imm32Out;
  output reg[31:0] retAddrOut;
  output reg[4:0] rdOut;
  always @(posedge clkIn or negedge resetIn) begin
    if (!resetIn) begin 
      signalsOut<=0;
      lessOut<=0;
      zeroOut<=0;
      resultOut<=0;
      PCRelAddrOut<=0;
      DataOut<=0;
      Imm32Out<=0;
      retAddrOut<=0;
      rdOut<=0;
      end
    else begin 
      signalsOut<=signalsIn;
      lessOut<=lessIn;
      zeroOut<=zeroIn;
      resultOut<=resultIn;
      PCRelAddrOut<=PCRelAddrIn;
      DataOut<=Data2In;
      Imm32Out<=Imm32In;
      retAddrOut<=retAddrIn;
      rdOut<=rdIn;
      end
    end
endmodule